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32-bit Cortex®-M4F MCU with dual OTG / dual QSPI / SDRAM / DVP, 288 MHz CPU

AT32F435 Series

As a microcontroller with excellent performance, AT32F435 series powered by ARM® Cortex®-M4 has brought about up to 288 MHz computing speed to the world. Featuring internal single precision floating-point unit (FPU), digital signal processor (DSP) and memory protection unit (MPU), it is provided with rich peripherals and flexible clock control mechanism for a wide range of applications. In particularly, it supports up to 4032 KB Flash memory and 512 KB SRAM, far beyond its counterparts in terms of performance.

Meanwhile, AT32F435 series is also provided with Security Library. This library is a defined area protected by a code in the main memory so that solution providers can not only program core algorithm in it with great peace of mind, but also provide downstream customers with room for secondary development. In addition, AT32F435 series incorporates 2x OTG controllers (Xtal-less in device mode), 2x QSPIs for external SPI Flash memory or SPI RAM extension, 8x UARTs, 2x CANs, 4x SPIs/I²Ss (2x full-duplex), 3x high-speed ADC engines (5.33 Msps), 8~14 bit digital video parallel interface (DVP). The XMC can be used for the extension of SDRAM, SRAM and PSRAM, greatly improving the reliability while lowering the costs. AT32F435 devices can perform well in the temperature range of -40 to 105 ℃. It also provides a variety of chips for selection in response to diverse memory requirements, with powerful on-chip resource allocation, higher integration and cost-effectiveness. Bringing all this together, the AT32F435 series is of course the best solution partner for applications that require higher computation and larger memory including industrial automation, motor control, IoT and consumer electronics.

Key Features

  • Performance
    • ARM® Cortex®-M4 MCU up to 288 MHz
    • Single precision floating-point unit (FPU)
    • Flash Memory access zero wait
    • 2.6 to 3.6 V application supply
    • I/Os 5 V-tolerant
    • Temperature range -40 to + 105 °C
  • Memories
    • 256/1024/4032 KBytes of Flash memory
    • 128 to 512 KBytes of SRAM
    • sLib: configurable part of main Flash set as a library area with code executable but secured, non-readable
    • Up to 2 x QSPIs, scalable Flash memory or RAM, address mapping support
  • Clock
    • PLL (288 MHz output)
    • External high-speed 4 to 25 MHz crystal oscillator
    • Internal high-speed 48 MHz RC oscillator (-40°C to 105°C)
    • Automatic clock calibration (ACC) (accuracy 1 % at TA = 25 °C, 2.5 % at TA = - 40 to +105 °C)
    • External low-speed 32.768kHz RTC crystal oscillator
    • Internal low-speed 40 kHz RC oscillator
  • Reset and supply management
    • Sleep, Deepsleep and Standby modes
    • Power-on/Low-voltage reset (POR/LVR)
    • Programmable voltage monitor (PVM)
    • VBAT supply for RTC and 20 x 32-bit backup registers
  • Analog peripherals
    • 3 x 12-bit 5.33 Msps A/D converters (up to 24 channels)
    • 2 x 12-bit D/A converters
  • Timers
    • 3 x 16-bit motor control PWM advanced timers with dead-time generation
    • 2 x 32-bit and 8 x 16-bit general-purpose timers
    • 2 x 16-bit basic timers
    • 2 x watchdog timers (Independent and Window)
    • SysTick timer: a 24-bit downcounter
  • ERTC：
    • enhanced RTC with alarm, subsecond precision and hardware calendar
  • Communication interfaces
    • 3 x I²Cs (SMBus/PMBus)
    • 4 x SPIs / I²S (36 MHz SPI, and I²S2/I²S3 support full-duplex)
    • 4 x USARTs + 4 x UARTs (ISO7816 interfaces, LIN, IrDA capability and modem control)
    • 2 x SDIOs
    • 2 x USB full-speed OTG controllers (crystal-less in device mode)
    • 2 x CAN interfaces (2.0B active)
    • Infrared transmitter
  • DMA
    • 22-channel DMA controller supports timers, ADC, DAC, SDIOs, I²Ss, SPIs, I²Cs, DVP, QSPIs and USARTs
  • Fast I/O ports
    • Up to 116 I/O ports, all mappable on 16 external interrupts and almost all 5 V-tolerant
    • All fast I/Os, control registers accessible with fᴀʜʙ speed
  • External memory controller (XMC)
    • Supports CF card, SRAM, PSRAM, NOR, NAND and SDRAM memories
    • Supports LCD parallel interface, 8080/6800 modes
  • Digital video parallel interface (DVP)
    • 8~14 bit digital video parallel interface
  • Packages
    • QFN48 6 x 6 mm
    • LQFP48 7 x 7 mm
    • LQFP64 10 x 10 mm
    • LQFP100 14 x 14 mm
    • LQFP144 20 x 20 mm

ARM Cortex®-M4F AT32F435 Product Selector

Part Number AT32F435xxU7
 AT32F435xxT7
CC CD CG CM CC CD CG CM RC RD RG RM VC VD VG VM ZC ZD ZG ZM
CPU frequency (MHz) 288
Int. Flash(1)(2) ZW(KB) 256 256 256 256 256
NZW(KB) 0 192 768 3776 0 192 768 3776 0 192 768 3776 0 192 768 3776 0 192 768 3776
Total (KB) 256 448 1024 4032 256 448 1024 4032 256 448 1024 4032 256 448 1024 4032 256 448 1024 4032
SRAM(2) (KB) 384KB(Default), Configurable up to 512KB
XMC - - 1(3) 1(4)(5) 1
SDRAM - - - 1(4) 1
QSPI 2 2 2 2 2
Timers Advanced-control 3 3 3 3 3
32-bit
general-purpose		 2 2 2 2 2
16-bit
general-purpose		 8 8 8 8 8
Basic 2 2 2 2 2
Systick 1 1 1 1 1
WDT 1 1 1 1 1
WWDT 1 1 1 1 1
ERTC 1 1 1 1 1
Communication I²C 3 3 3 3 3
SPI/I²S(6) 4/4 (2 full-duplex) 4/4 (2 full-duplex) 4/4 (2 full-duplex) 4/4 (2 full-duplex) 4/4 (2 full-duplex)
USART+UART 3/4(7) 3/4(7) 4/4 4/4 4/4
SDIO 18 18 2 2 2
USB full-speed OTG 2 2 2 2 2
CAN 2 2 2 2 2
Infrared transmitter 1 1 1 1 1
Analog 12-bit ADC
numbers/channels		 3
10 10 16 16 24
12-bit DAC
numbers/channels		 2
2 2 2 2 2
DVP(9) 1 1 1 1 1
GPIO 39 39 53 84 116
Operating temperatures -40°C ~ 105°C
Packages QFN48
6x6 mm		 LQFP48
7x7 mm		 LQFP64
10x10 mm		 LQFP100
14x14 mm		 LQFP144
20x20 mm
Note
  1. ZW = zero wait-state, up to SYSCLK 288 MHz
    NZW = non-zero wait-state
  2. The internal Flash and SRAM sizes are programmable with user option bytes on the basis of an integer multiple of 64 bytes.
  3. For LQFP64 package, XMC only supports 8-bit LCD panel.
  4. For LQFP100 package, XMC only supports memory bank1, memory bank2 and SDRAM. With NE1 chip select, bank1 supports NOR/PSRAM that are directly connected to multiplexed signals, while bank2 supports 16-bit/8-bit NAND using NCE2 chip select. Interrupt lines are not available on the LQFP100 package without Port G.
  5. For LQFP100 package, XMC can be connected to the non-multiplexed PSRAM and SRAM using external latch devices. Refer to AN0068 for more information.。
  6. Half-duplex I2S shares the same pin with SPI.
  7. For LQFP48 and QFN48 packages, UART8 is not available and USART6 is used as UART for no CK pinout.
  8. For LQFP48 and QFN48 packages, either SDIO1 or SDIO2 can be used. The SDIO2 only supports maximum 4-bit (D0~D3) mode.
  9. Only LQFP144 package supports maximum 14-bit mode; LQPF48 and QFN48 packages support only 8-bit mode; LQFP100 and LQFP64 packages support maximum 12-bit mode.

Resources

Product Select Guide

Cross Reference Table

Description Download Version Date
Cross reference table    AT32 MCU V202011 2020.11.03

Datasheet

Reference Manual

Evaluation Board

Component Library

BSP

Pack

Tool

USB Tool and Driver

Application Note

Tech Support

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